1. Field
The present disclosure relates to a flat panel display device and a method for making the same, and more specifically to a flat panel display device capable of preventing a chipping phenomenon of a pixel definition layer, and a method for making the same.
2. Description of the Related Technology
FIG. 1 is a schematic cross-sectional view of a flat panel display. Referring to FIG. 1, a flat panel display 10 includes a substrate 100, a thin film transistor 110, a planarization layer 120, a first electrode layer 130, a pixel definition layer 140, an emitting layer 150 and a second electrode layer 160.
A thin film transistor 110 is formed on the substrate 100. The thin film transistor 110 includes a semiconductor layer 111, a gate electrode 112 and source/drain electrodes 113a, 113b. A planarization layer 120 is formed on the thin film transistor 110. A first electrode layer 130 electrically connected to the source or drain electrodes 113a, 113b is formed on the planarization layer 120. A pixel definition layer 140 is formed on the first electrode layer 130 and includes an opening (not shown) for at least partially exposing the first electrode layer 130. An emitting layer 150 is formed on the pixel definition layer 140. A second electrode layer 160 is formed on the emitting layer 150 and the pixel definition layer 140.
The flat panel display described above has a problem that its charges do not move stably since a potential barrier (tunneling) is increased between the pixel definition layer 140 and the planarization layer 120 including the first electrode layer 130. This problem occurs because the pixel definition layer 140 is chipped from the planarization layer if the pixel definition layer 140 is not formed stably thereon.